The main electrical parameters of a transformer that are of interest to a circuit designer are the transformer turns ratio, n, and the coefficient of magnetic coupling, k. If the magnetic coupling between windings is perfect (i.e. there is no leakage of the magnetic flux) then k is unity. On the other hand, k is zero for totally uncoupled windings. A practical transformer will have a value of k between these two extremes. Typically, for an on-chip monolithic transformer a value of k between 0.75 and 0.9 can be achieved. A higher value of k results in lower losses.
Many topologies have been proposed for on-chip transformers. However, each has its drawbacks. For example, one topology (known as a Shibata or parallel architecture) is easy to design but the total lengths of the primary and secondary windings are not equal. Hence the transformer turns ratio, n, can differ from 1 even if the same number of turns of metal are provided in each winding.
In another topology (known as the Finlay or stacked architecture) a transformer occupying a low area and hence high coupling coefficient, k, can be realised. However, special care must be taken during implementation as the design makes use of both upper and intermediate metal layers. The intermediate metal layers are generally quite thin, leading to higher electrical resistance and thus a high insertion loss. Also, the upper metal layer generally having a lower resistance than the intermediate metal layers creates an asymmetry in the electrical response of the transformer.
Another problem is brought about by the upper winding being electrically shielded from the “conductive” substrate by the lower winding, and hence the parasitic capacitance to the substrate (and the associated dissipation) differs for each winding.
In addition, there is a large parallel plate component to the capacitance between windings due to the overlapping of metal layers, which limits the frequency response.